Faraday Technology Corporation announced it has collaborated with Infineon to develop a SONOS eFlash platform on UMC's 40uLP process. This platform includes a newly developed eFlash subsystem IP and complete eFlash testing solution with easy-to-integrate and fast data access features. This total solution facilitates customers to accelerate product development and utilize the flash memory technology more easily; meanwhile, it also simplifies SONOS eFlash testing with a built-in self-test (BIST) function to provide customers solid quality advantages.

To meet the demand for 40nm low-power and secure eFlash driven by AI, smart grid, IoT, and MCU applications, Faraday and Infineon jointly developed this SONOS eFlash platform. This platform mainly contains a flash memory block, controller and the new subsystem IP. This subsystem includes essential bus interface, integrated clock control circuits and additional features, such as automatic eFlash initialization, simplified erase/write procedure to offload CPU overhead, read/write protection, and a pseudo random write buffer, for seamless IP integration and utilization of SONOS eFlash IP.

In addition, this subsystem with BIST enables the chips to be tested on general testing equipment to ensure the flash memory quality and reliability, as well for testing time reduction.