Faraday Technology Corporation unveiled its complete imaging and display high-speed interface IP set on UMC’s 40LP and 28HPC/HPC+ process nodes, including MIPI D-PHY (TX/RX, controller), V-by-One HS (TX/RX, controller), and LVDS (TX/RX, I/O). These IPs are designed with optimized PPA (power, performance, area) for various imaging and display systems, such as 4K/8K projectors, pico projectors, automotive HUDs, in-vehicle infotainment systems, POS systems, AR/VR devices, wearable devices, robots, multifunction printers (MFP), digital cameras, and surveillance cameras. The company provides application-oriented design services for MIPI D-PHY, such as multiple-TX-lane IP solutions for high-resolution and high-frame-rate display engines, rich RX combo IO solutions (MIPI/sub-LVDS/HiSPi/CMOS) to shrink chip size, and flexible data/clock lane configurations to support various device interfaces. In addition, Faraday offers its MIPI combo PHY evaluation board to help customers create prototypes for system-level development and verification at the pre-silicon stage to ensure design qualities.